16 research outputs found

    BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations

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    Objective: The advent of High-Performance Computing (HPC) in recent years has led to its increasing use in brain study through computational models. The scale and complexity of such models are constantly increasing, leading to challenging computational requirements. Even though modern HPC platforms can often deal with such challenges, the vast diversity of the modeling field does not permit for a single acceleration (or homogeneous) platform to effectively address the complete array of modeling requirements. Approach: In this paper we propose and build BrainFrame, a heterogeneous acceleration platform, incorporating three distinct acceleration technologies, a Dataflow Engine, a Xeon Phi and a GP-GPU. The PyNN framework is also integrated into the platform. As a challenging proof of concept, we analyze the performance of BrainFrame on different instances of a state-of-the-art neuron model, modeling the Inferior- Olivary Nucleus using a biophysically-meaningful, extended Hodgkin-Huxley representation. The model instances take into account not only the neuronal- network dimensions but also different network-connectivity circumstances that can drastically change application workload characteristics. Main results: The synthetic approach of three HPC technologies demonstrated that BrainFrame is better able to cope with the modeling diversity encountered. Our performance analysis shows clearly that the model directly affect performance and all three technologies are required to cope with all the model use cases.Comment: 16 pages, 18 figures, 5 table

    BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations

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    Objective. The advent of high-performance computing (HPC) in recent years has led to its increasing use in brain studies through computational models. The scale and complexity of such models are constantly increasing, leading to challenging computational requirements. Even though modern HPC platforms can often deal with such challenges, the vast diversity of the modeling field does not permit for a homogeneous acceleration platform to effectively address the complete array of modeling requirements. Approach. In this paper we propose and build BrainFrame, a heterogeneous acceleration platform that incorporates three distinct acceleration technologies, an Intel Xeon-Phi CPU

    EuroEXA - D2.6: Final ported application software

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    This document describes the ported software of the EuroEXA applications to the single CRDB testbed and it discusses the experiences extracted from porting and optimization activities that should be actively taken into account in future redesign and optimization. This document accompanies the ported application software, found in the EuroEXA private repository (https://github.com/euroexa). In particular, this document describes the status of the software for each of the EuroEXA applications, sketches the redesign and optimization strategy for each application, discusses issues and difficulties faced during the porting activities and the relative lesson learned. A few preliminary evaluation results have been presented, however the full evaluation will be discussed in deliverable 2.8

    Performance Analysis of Accelerated Biophysically-Meaningful Neuron Simulations

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    In-vivo and in-vitro experiments are routinely used in neuroscience to unravel brain functionality. Although they are a powerful experimentation tool, they are also time-consuming and, often, restrictive. Computational neuroscience attempts to solve this by using biologically-plausible and biophysically-meaningful neuron models, most prominent among which are the conductance-based models. Their computational complexity calls for accelerator-based computing to mount large-scale or real-time neuroscientific experiments. In this paper, we analyze and draw conclusions on the class of conductance models by using a representative modeling application of the inferior olive (InfOli), an important part of the olivocerebellar brain circuit. We conduct an extensive profiling session to identify the computational and data-transfer requirements of the application under various realistic use cases. The application is, then, ported onto two acceleration nodes, an Intel Xeon Phi and a Maxeler Vectis Data Flow Engine (DFE). We evaluate the performance scalability and resource requirements of the InfOli application on the two target platforms. The analysis of InfOli, which is a real-life neuroscientific application, can serve as a useful guide for porting a wide range of similar workloads on platforms like the Xeon Phi or the Maxeler DFEs. As accelerators are increasingly populating High-Performance Computing (HPC) infrastructure, the current paper provides useful insight on how to optimally use such nodes to run complex and relevant neuron modeling workloads

    Accelerating complex brain-model simulations on GPU platforms

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    The Inferior Olive (IO) in the brain, in conjunction with the cerebellum, is responsible for crucial sensorimotor-integration functions in humans. In this paper, we simulate a computationally challenging IO neuron model consisting of three compartments per neuron in a network arrangement on GPU platforms. Several GPU platforms of the two latest NVIDIA GPU architectures (Fermi, Kepler) have been used to simulate large-scale IO-neuron networks. These networks have been ported on 4 diverse GPU platforms and implementation has been optimized, scoring 3x speedups compared to its unoptimized version. The effect of GPU L1-cache and thread block size as well as the impact of numerical precision of the application on performance have been evaluated and best configurations have been chosen. In effect, a maximum speedup of 160x has been achieved with respect to a reference CPU platform

    ESL design of customizable real-time neuron networks

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    In this paper, we present the design and implementation of an Inferior-Olivary Nucleus (ION) network on an FPGA device. Compared with existing neuron networks, the proposed design allows to easily customize the network topology and implement existing as well as ad-hoc topologies, in order to explore different levels of connectivities between the cells. Starting from the model of an ION cell, the model has been optimized and an ION network has been designed and implemented in multiple steps. By using the Xilinx Vivado Suite, the design has been synthesized and mapped on a Virtex 7 XC7VX550T FPGA device. Experimental results show that a network of 48 ION cells can be simulated in brain real-time using double floating-point arithmetic, which allows to precisely simulate the network's behavior

    D2.1: Application requirements and specifications

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    Basic taxonomy of datacenter applications in terms of QoS requirements, and application-side requirements that are crucial for each of the considered VINEYARD use cases

    FlexHH: A Flexible Hardware Library for Hodgkin-Huxley-Based Neural Simulations

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    The Hodgkin-Huxley (HH) neuron is one of the most biophysically-meaningful models used in computational neuroscience today. Ironically, the model's high experimental value is offset by its disproportional computational complexity. To such an extent that neuroscientists have either resorted to simpler models, losing precious neuron detail, or to using high-performance computing systems, to gain acceleration, for complex models. However, multicore/multinode CPU-based systems have proven too slow while FPGA-based ones have proven too time-consuming to (re)deploy to. Clearly, a solution that bridges user friendliness and high speedups is necessary. This paper presents flexHH, a flexible FPGA library implementing five popular, highly

    FlexHH: A Flexible Hardware Library for Hodgkin-Huxley-Based Neural Simulations

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    The Hodgkin-Huxley (HH) neuron is one of the most biophysically-meaningful models used in computational neuroscience today. Ironically, the model's high experimental value is offset by its disproportional computational complexity. To such an extent that neuroscientists have either resorted to simpler models, losing precious neuron detail, or to using high-performance computing systems, to gain acceleration, for complex models. However, multicore/multinode CPU-based systems have proven too slow while FPGA-based ones have proven too time-consuming to (re)deploy to. Clearly, a solution that bridges user friendliness and high speedups is necessary. This paper presents flexHH, a flexible FPGA library implementing five popular, highly parameterizable variants of the HH neuron model. flexHH is the first crucial step towards making FPGA-based simulations of compute-intensive neural models available to neuroscientists without the debilitating penalty of re-engineering and re-synthesis. Through flexHH, the user can instantiate custom models and immediately take advantage of the acceleration without the mediation of an engineer, which has proven to be a major inhibitor to full adoption of FPGAs in neuroscience labs. In terms of performance, flexHH achieves speedups between 8 × - 20 × compared to sequential-C implementations, while only a small drop in real-time capabilities is observed when compared to hardcoded FPGA-based versions of the models tested. Computer EngineeringNumerical AnalysisBio-Electronic

    MCluster: A Software Framework for Portable Device-Based Volunteer Computing

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    Recent market forecasts predict that the portablecomputing trend will vastly spread, as by 2020 there will bemore than 3 billion LTE device users worldwide. Motivatedby this fact, many companies and research institutes havealready launched research projects that utilize portable devices, voluntarily provided by users, to perform the requiredcomputations. Many such projects employ Berkeley's BOINCmiddleware, since it can support a large variety of stationaryand mobile devices. However, currently available BOINChigh-level APIs, either do not support portable devices orlack advanced processing capabilities (such as inter-node taskdependencies) and/or easiness of use. To resolve these issues, we propose the mCluster software framework for applicationexecution powered by the BOINC middleware on portable devices. mCluster adopts a task-based programming model thatrequires simple, pragma-based annotations of the applicationsoftware, in order to dynamically resolve task dependencies. To evaluate our framework, we have have mapped a scientificapplication from the neuroscience domain on an small-scalednetwork of portable devices. mCluster significantly reducesthe required programming effort and complexity to efficientlymap BOINC-powered applications with task dependencies onportable devices compared to previous approaches
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